1. Field of the Invention
This invention relates generally to the field of data processing systems and more specifically to the case of a small memory to indicate if corresponding words in a large memory are present.
2. Description of the Prior Art
Data processing systems may organize the information stored in main memory in a number of segments. As the system processes a program containing a number of routines, new segments replace the previous segments as new information is brought into main memory. The programmer writes the software using logical addresses. The operating system stores this program information in physical addresses in main memory. The operating system also develops a translation table which indicates the starting physical address for each segment. As new segments replace previous segments, the information in the translation table changes since the operating system usually fits segments in main memory wherever the segment fits.
Prior art systems stored a relatively small number of segments in main memory. Therefore, rewriting the translation table took a small number of cycles. However, as new data processing systems were developed, the number of segments written in main memory increased with the subsequent increase in the number of cycles required for rewriting the translation table.
Data processing systems using cache memories have a similar problem in that it takes many memory cycles to rewrite a cache memory. These systems use a validity bit to indicate the presence of valid information in an addressed location. However, these systems store the validity bit for each addressed location in cache.
Information is deleted from cache by deleting the validity bit. This system is useful when a block or a number of blocks of information are deleted from cache.